Senior Software Architect at Luminex Corporation.
Experience in: C#, C++ 11, Scheme, SmallTalk, C, Azure Data Analytics
- Austin, TX
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3 open and 1 closed projects found.-
- #5 updated
Apr 10, 2026 - FPGA memory and peripheral IO wrapped around a physical WD65C02. The FPGA generates the PHI2 clock signal and manages processor state. It also provides RAM and ROM to the CPU as well as memory mapped peripheral IO#3 updated
Dec 18, 2025





