SIGA is a 2D graphic accelerator developed from scratch, without the use of any IP core. The SDRAM controller implemented in this project utilizes burst commands wherever possible.
- SVGA Signal: 800x600 resolution @ 56 Hz timing
- Pixel Format: RGB565
- Filling rectangles
- Drawing lines (implemented using the Bresenham algorithm)
- Drawing circles (implemented using the Bresenham algorithm)
- Filling circles (implemented using the Bresenham algorithm)
- Adding support for drawing triangles
- Implementing alpha-blending
- Incorporating anti-aliasing techniques
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Example and Board Specifications: Included in this repository is an example demonstrating the current status of the project. For testing purposes, I utilized the ESPIER_III V105 board, which is an affordable Spartan6 board. Please note that the board's labels are in Chinese and are located in the corner.
- FPGA: xc6slx9-2tqg144c (This model appears to lack an internal hard DDR controller)
- SDRAM: w9864g6kh
For detailed board schematics, refer to the ESPIER_III-Schematic.pdf document in this repository.
Here are some images showcasing the example:
Used Board:
