Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
figures		figures
.gitignore		.gitignore
Makefile		Makefile
README.md		README.md
cpu.v		cpu.v
cpu.vcd		cpu.vcd
cpu_s.v		cpu_s.v
cpu_tb.cpp		cpu_tb.cpp
ram.mk		ram.mk
ram.png		ram.png
ram.v		ram.v
ram.vcd		ram.vcd
ram_s.v		ram_s.v
ram_tb.cpp		ram_tb.cpp
reporte.pdf		reporte.pdf
reporte.tex		reporte.tex

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Procesador de 8bits con verilog

Requisitos

verilator
gtkwave
gnu make

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Procesador de 8bits en verilog compilado con verilator

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Verilog 47.7%
TeX 32.6%
C++ 16.2%
Makefile 3.5%