CDD merge error

[MaxedaHongYiShao]

Hi,

I'm using multiple testbenches to verify the same design (to the top module) via Icarus Verilog.
In the testbench everything is the same, except the task name and its content.
For example,

module tb
<some_pin_declaration>
top dut(
<pin_assign>
);
task a
<somethig_to_do>
endtask
initial begin
a
end
endmodule

task a here might be b in other testbench.

From covered score, I was able to produce corresponding .cdd files.
Yet I got core dumped when I tried covered merge

covered: expr.c:1829: expression_merge: Assertion 'base->line == other->line' failed.

the cdd files seem good separately cuz they can run smoothly to produce report by their own.
Any idea what might cause this error? Thx!