PaddlePaddle custom device implementaion. (『飞桨』自定义硬件接入实现)

PArallel Distributed Deep LEarning: Machine Learning Framework from Industrial Practice （『飞桨』核心框架，深度学习&机器学习高性能单机、分布式训练和跨平台部署）

PaddleFormers is an easy-to-use library of pre-trained large language model zoo based on PaddlePaddle.

Documentations for PaddlePaddle

The official repository for ERNIE 4.5 and ERNIEKit – its industrial-grade development toolkit based on PaddlePaddle.

FlashInfer: Kernel Library for LLM Serving

基于PaddlePaddle的自动化功能开发小组

PaddlePaddle Code Convert Toolkit. 『飞桨』深度学习代码转换工具

High-performance Inference and Deployment Toolkit for LLMs and VLMs based on PaddlePaddle

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

OpenXuantie - OpenC910 Core

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

OpenXuantie - OpenE906 Core

OpenXuantie - OpenE902 Core

OpenXuantie - OpenC906 Core

PicoRV32 - A Size-Optimized RISC-V CPU

RSD: RISC-V Out-of-Order Superscalar Processor

An open-source microcontroller system based on RISC-V

VeeR EH1 core

Originally from Intel

The Ultra-Low Power RISC-V Core

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.