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32-Verilog-Mini-Projects
32-Verilog-Mini-Projects PublicImplementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip …
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tdc-1
tdc-1 PublicForked from gonzagab/tdc
A Time to Digital Converter (TDC) on a Xilinx Virtex 5 FPGA.
VHDL 1
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Kaggle_Titanic
Kaggle_Titanic PublicForked from fayduan/Kaggle_Titanic
the data and ipython notebook of my attempt to solve the kaggle titanic problem
Jupyter Notebook
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