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GSIM: A Fast RTL Simulator for Large-Scale Designs

GSIM accepts chirrtl, and compiles it to C++

Prerequisites

Quike Start

  • GSIM provides 4 RISC-V cores ready for simulation: ysyx3, Rocket, BOOM, XiangShan.

  • To try GSIM, using

    $ make init
    $ make run dutName=core
    
  • Set core to ysyx3, rocket, small-boom, large-boom, minimal-xiangshan or default-xiangshan

Usage

  • Run make build-gsim to build GSIM
  • Build a static binary locally with make STATIC=1 build-gsim (CI artifacts are built statically).
  • Run build/gsim/gsim $(chirrtl-file) to compile chirrtl to C++
  • Refer to build/gsim/gsim --help for more information
  • See C++ harness example to know how it interacts with the emitted C++ code.

Papers and Presentations

GSIM: Accelerating RTL Simulation for Large-Scale Design

Lu Chen, Dingyi Zhao, Zihao Yu, Ninghui Sun, Yungang Bao

Design Automation Conference (DAC), 2025

Paper PDF | Slides | Chinese Slides

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