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Yet another alternative curriculum vitae/résumé class with LaTeX
Enhance your résumé with Large Language Models
Verilog AXI components for FPGA implementation
A List of Free and Open Source Hardware Verification Tools and Frameworks
OpenSource GPU, in Verilog, loosely based on RISC-V ISA
Description of a RISC-V architecture based on MIPS 3000
AMBA bus lecture material
To design test bench of the APB protocol
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
Modular hardware build system
Haptic input knob with software-defined endstops and virtual detents
A curated list of awesome things related to learning Zero-Knowledge Proofs (ZKP).
Docker build script for Arch Linux base with OpenVPN, WireGuard, Privoxy (http(s) proxy) and microsocks (Socks5 proxy)
Basic Pong you can extend with rotary, sound, vga generator and autopilot
vendor independent TinyML deep learning library, compiler and inference framework microcomputers and micro-controllers
CORDIC VLSI-IP for deep learning activation functions
A collection of Master XDC files for Digilent FPGA and Zynq boards.
Project F brings FPGAs to life with exciting open-source designs you can build on.
Open source ISS and logic RISC-V 32 bit project
A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
A self-contained online book containing a library of FPGA design modules and related coding/design guides.
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
A list of resources related to the open-source FPGA projects
