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A machine learning accelerator core designed for energy-efficient AI at the edge.
Virtual whiteboard for sketching hand-drawn like diagrams
WinDirStat is a disk usage statistics viewer and cleanup tool for Microsoft Windows
Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…
The official NaplesPU hardware code repository
🎮 An open-source game speed modifier.[一款开源的游戏变速器]
This is a Software Defined Radio(SDR) project implementing a DVB-T2 receiver.
Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.
An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
Basic USB 1.1 Host Controller for small FPGAs
Basic Simulink Blocks for modeling CDRs and PLLs
Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
USB Serial on the TinyFPGA BX
An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
USB3 PIPE interface for Xilinx 7-Series
A lightweight TUI application to view and query tabular data files, such as CSV, TSV, and parquet.
Get windows CPU temperature with WinRing0 driver and library
WinRing0 is a hardware access library for Windows.