DecodeTheEncoded
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Yuhan Wang
Humber-186
Student of Tsinghua University
@tsinghua University
Tsinghua University Beijing, China
Rishiyur S. Nikhil
rsnikhil
Hardware design: mostly RISC-V, mostly using Bluespec BSV.
Also Haskell, RISC-V Formal Specifications, tutorials.
Bluespec, Inc. Framingham, MA, USA
Ruohan (Richard) Yan
richardyrh
EECS BS '22, MS '24, 2nd Year PhD @ UC Berkeley SLICE Lab | Ex-Apple PA and SEG Intern, Ex-Intel Labs Intern
周耀阳 (Zhou Yaoyang)
shinezyy
Interested in LLM DSA, CPU, and performance analysis; PhD in computer architecture; Husband & Father
Vikram Jain
vikramjain236
Postdoctoral researcher in SLICE+BWRC labs, UC Berkeley | PhD in heterogeneous systems-on-chip from MICAS, KU Leuven.
SLICE and BWRC, UC Berkeley Berkeley, United States
Mingyu Woo
mgwoo
Received Ph.D. degree at UC San Diego ABK Group.
I was the main developer of OpenROAD (DARPA-POSH), T8(Floorplan) and T9(Placement).
http://mgwoo.github.io
Qualcomm San Diego
Thomas Copper
TurnOffNOD
Now a student of University of Chinese Academy of Sciences, Hangzhou Institute of Advanced Study
University of Chinese Academy of Sciences Shanghai
Schuyler Eldridge
seldridge
Hardware compiler hacker. Sometimes RISC-V accelerator builder. PhD from @bu-icsg.
@SiFive New York, NY
Yuchi Miao
maksyuki
SoC design engineer at Center for Advanced Computer Systems (ACS) of Institute of Computing Technology, Chinese Academy of Sciences.
founder @microdynamics
Institute of Computing Technology, CAS Beijing, China
Andrew Waterman
aswaterman
SiFive co-founder, RISC-V architect, BSE Duke, Ph.D. Cal
@sifive @riscv Berkeley, CA, USA
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