File:Digital Acquisition Board - HERALD Design Manual.pdf

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Digital_Acquisition_Board_-_HERALD_Design_Manual.pdf(file size: 2.51 MB, MIME type: application/pdf)

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Date/TimeDimensionsUserComment
current12:13, 18 November 2014 (2.51 MB)JoeGreenberg (talk | contribs)Incorporate latest test results. Include section on changes for next board. Include section on unresolved problems
09:41, 3 November 2014 (1.89 MB)JoeGreenberg (talk | contribs)
10:07, 19 May 2014 (1.57 MB)JoeGreenberg (talk | contribs)
10:55, 10 February 2014 (715 KB)JoeGreenberg (talk | contribs)
07:57, 13 January 2014 (636 KB)JoeGreenberg (talk | contribs)Add section to Design Manual incorporating the Comments from Schematic Reviewers and the actions taken based on those comments.
12:22, 3 December 2013 (740 KB)RichLacasse (talk | contribs)Add new info in several sections. Change the name from SNAP to HERALD
06:46, 23 September 2013 (631 KB)JoeGreenberg (talk | contribs)Add Section 4.4 on the FPGA Design.
09:31, 10 September 2013 (1.06 MB)RichLacasse (talk | contribs)Added sections on Xilinx design and synthesizer design
12:31, 28 August 2013 (688 KB)RichLacasse (talk | contribs)Added some discussion of the ADC and Clock distribution circuits. Added schematics of ADC and Clk Generator
04:59, 14 August 2013 (124 KB)RichLacasse (talk | contribs)Added sections about ADC and clock driver
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