|  | 
|  | 1 | +/* | 
|  | 2 | + ******************************************************************************* | 
|  | 3 | + * Copyright (c) 2020-2021, STMicroelectronics | 
|  | 4 | + * All rights reserved. | 
|  | 5 | + * | 
|  | 6 | + * This software component is licensed by ST under BSD 3-Clause license, | 
|  | 7 | + * the "License"; You may not use this file except in compliance with the | 
|  | 8 | + * License. You may obtain a copy of the License at: | 
|  | 9 | + *                        opensource.org/licenses/BSD-3-Clause | 
|  | 10 | + * | 
|  | 11 | + ******************************************************************************* | 
|  | 12 | + */ | 
|  | 13 | +/* | 
|  | 14 | + * Automatically generated from STM32F100C(4-6)Tx.xml | 
|  | 15 | + * CubeMX DB release 6.0.21 | 
|  | 16 | + */ | 
|  | 17 | +#if !defined(CUSTOM_PERIPHERAL_PINS) | 
|  | 18 | +#include "Arduino.h" | 
|  | 19 | +#include "PeripheralPins.h" | 
|  | 20 | + | 
|  | 21 | +/* ===== | 
|  | 22 | + * Notes: | 
|  | 23 | + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other | 
|  | 24 | + *   HW peripheral instances. You can use them the same way as any other "normal" | 
|  | 25 | + *   pin (i.e. analogWrite(PA7_ALT1, 128);). | 
|  | 26 | + * | 
|  | 27 | + * - Commented lines are alternative possibilities which are not used per default. | 
|  | 28 | + *   If you change them, you will have to know what you do | 
|  | 29 | + * ===== | 
|  | 30 | + */ | 
|  | 31 | + | 
|  | 32 | +//*** ADC *** | 
|  | 33 | + | 
|  | 34 | +#ifdef HAL_ADC_MODULE_ENABLED | 
|  | 35 | +WEAK const PinMap PinMap_ADC[] = { | 
|  | 36 | +  {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 | 
|  | 37 | +  {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 | 
|  | 38 | +  {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 | 
|  | 39 | +  {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 | 
|  | 40 | +  {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 | 
|  | 41 | +  {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 | 
|  | 42 | +  {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 | 
|  | 43 | +  {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 | 
|  | 44 | +  {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 | 
|  | 45 | +  {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 | 
|  | 46 | +  {NC,   NP,   0} | 
|  | 47 | +}; | 
|  | 48 | +#endif | 
|  | 49 | + | 
|  | 50 | +//*** DAC *** | 
|  | 51 | + | 
|  | 52 | +#ifdef HAL_DAC_MODULE_ENABLED | 
|  | 53 | +WEAK const PinMap PinMap_DAC[] = { | 
|  | 54 | +  {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 | 
|  | 55 | +  {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 | 
|  | 56 | +  {NC,   NP,   0} | 
|  | 57 | +}; | 
|  | 58 | +#endif | 
|  | 59 | + | 
|  | 60 | +//*** I2C *** | 
|  | 61 | + | 
|  | 62 | +#ifdef HAL_I2C_MODULE_ENABLED | 
|  | 63 | +WEAK const PinMap PinMap_I2C_SDA[] = { | 
|  | 64 | +  {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_DISABLE)}, | 
|  | 65 | +  {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | 
|  | 66 | +  {NC,   NP,   0} | 
|  | 67 | +}; | 
|  | 68 | +#endif | 
|  | 69 | + | 
|  | 70 | +#ifdef HAL_I2C_MODULE_ENABLED | 
|  | 71 | +WEAK const PinMap PinMap_I2C_SCL[] = { | 
|  | 72 | +  {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_DISABLE)}, | 
|  | 73 | +  {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | 
|  | 74 | +  {NC,   NP,   0} | 
|  | 75 | +}; | 
|  | 76 | +#endif | 
|  | 77 | + | 
|  | 78 | +//*** TIM *** | 
|  | 79 | + | 
|  | 80 | +#ifdef HAL_TIM_MODULE_ENABLED | 
|  | 81 | +WEAK const PinMap PinMap_TIM[] = { | 
|  | 82 | +  {PA_0,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 | 
|  | 83 | +  {PA_0_ALT1,  TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 | 
|  | 84 | +  {PA_1,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_DISABLE, 2, 0)}, // TIM2_CH2 | 
|  | 85 | +  {PA_1_ALT1,  TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 | 
|  | 86 | +  {PA_2,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_DISABLE, 3, 0)}, // TIM2_CH3 | 
|  | 87 | +  {PA_2_ALT1,  TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 | 
|  | 88 | +  {PA_2_ALT2,  TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_DISABLE, 1, 0)}, // TIM15_CH1 | 
|  | 89 | +  {PA_3,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_DISABLE, 4, 0)}, // TIM2_CH4 | 
|  | 90 | +  {PA_3_ALT1,  TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 | 
|  | 91 | +  {PA_3_ALT2,  TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_DISABLE, 2, 0)}, // TIM15_CH2 | 
|  | 92 | +  {PA_6,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_DISABLE, 1, 0)}, // TIM3_CH1 | 
|  | 93 | +  {PA_6_ALT1,  TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM16_ENABLE, 1, 0)}, // TIM16_CH1 | 
|  | 94 | +  {PA_7,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N | 
|  | 95 | +  {PA_7_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_DISABLE, 2, 0)}, // TIM3_CH2 | 
|  | 96 | +  {PA_7_ALT2,  TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM17_ENABLE, 1, 0)}, // TIM17_CH1 | 
|  | 97 | +  {PA_8,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 0)}, // TIM1_CH1 | 
|  | 98 | +  {PA_8_ALT1,  TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 | 
|  | 99 | +  {PA_9,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 0)}, // TIM1_CH2 | 
|  | 100 | +  {PA_9_ALT1,  TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 | 
|  | 101 | +  {PA_10,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 0)}, // TIM1_CH3 | 
|  | 102 | +  {PA_10_ALT1, TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 | 
|  | 103 | +  {PA_11,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 4, 0)}, // TIM1_CH4 | 
|  | 104 | +  {PA_11_ALT1, TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 | 
|  | 105 | +  {PA_15,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 | 
|  | 106 | +  {PA_15_ALT1, TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 | 
|  | 107 | +  {PB_0,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N | 
|  | 108 | +  {PB_0_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_DISABLE, 3, 0)}, // TIM3_CH3 | 
|  | 109 | +  {PB_0_ALT2,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 | 
|  | 110 | +  {PB_1,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N | 
|  | 111 | +  {PB_1_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_DISABLE, 4, 0)}, // TIM3_CH4 | 
|  | 112 | +  {PB_1_ALT2,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 | 
|  | 113 | +  {PB_3,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 | 
|  | 114 | +  {PB_3_ALT1,  TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 | 
|  | 115 | +  {PB_4,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 | 
|  | 116 | +  {PB_5,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 | 
|  | 117 | +  {PB_6,       TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM16_CH1N | 
|  | 118 | +  {PB_7,       TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM17_CH1N | 
|  | 119 | +  {PB_8,       TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM16_DISABLE, 1, 0)}, // TIM16_CH1 | 
|  | 120 | +  {PB_9,       TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM17_DISABLE, 1, 0)}, // TIM17_CH1 | 
|  | 121 | +  {PB_10,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 | 
|  | 122 | +  {PB_10_ALT1, TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 | 
|  | 123 | +  {PB_11,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 | 
|  | 124 | +  {PB_11_ALT1, TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 | 
|  | 125 | +  {PB_13,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 1, 1)}, // TIM1_CH1N | 
|  | 126 | +  {PB_14,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 2, 1)}, // TIM1_CH2N | 
|  | 127 | +  {PB_14_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_ENABLE, 1, 0)}, // TIM15_CH1 | 
|  | 128 | +  {PB_15,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_DISABLE, 3, 1)}, // TIM1_CH3N | 
|  | 129 | +  {PB_15_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM15_CH1N | 
|  | 130 | +  {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM15_ENABLE, 2, 0)}, // TIM15_CH2 | 
|  | 131 | +  {NC,         NP,    0} | 
|  | 132 | +}; | 
|  | 133 | +#endif | 
|  | 134 | + | 
|  | 135 | +//*** UART *** | 
|  | 136 | + | 
|  | 137 | +#ifdef HAL_UART_MODULE_ENABLED | 
|  | 138 | +WEAK const PinMap PinMap_UART_TX[] = { | 
|  | 139 | +  {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_DISABLE)}, | 
|  | 140 | +  {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_DISABLE)}, | 
|  | 141 | +  {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | 
|  | 142 | +  {NC,   NP,     0} | 
|  | 143 | +}; | 
|  | 144 | +#endif | 
|  | 145 | + | 
|  | 146 | +#ifdef HAL_UART_MODULE_ENABLED | 
|  | 147 | +WEAK const PinMap PinMap_UART_RX[] = { | 
|  | 148 | +  {PA_3,  USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_DISABLE)}, | 
|  | 149 | +  {PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_DISABLE)}, | 
|  | 150 | +  {PB_7,  USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | 
|  | 151 | +  {NC,    NP,     0} | 
|  | 152 | +}; | 
|  | 153 | +#endif | 
|  | 154 | + | 
|  | 155 | +#ifdef HAL_UART_MODULE_ENABLED | 
|  | 156 | +WEAK const PinMap PinMap_UART_RTS[] = { | 
|  | 157 | +  {PA_1,  USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_DISABLE)}, | 
|  | 158 | +  {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | 
|  | 159 | +  {NC,    NP,     0} | 
|  | 160 | +}; | 
|  | 161 | +#endif | 
|  | 162 | + | 
|  | 163 | +#ifdef HAL_UART_MODULE_ENABLED | 
|  | 164 | +WEAK const PinMap PinMap_UART_CTS[] = { | 
|  | 165 | +  {PA_0,  USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | 
|  | 166 | +  {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | 
|  | 167 | +  {NC,    NP,     0} | 
|  | 168 | +}; | 
|  | 169 | +#endif | 
|  | 170 | + | 
|  | 171 | +//*** SPI *** | 
|  | 172 | + | 
|  | 173 | +#ifdef HAL_SPI_MODULE_ENABLED | 
|  | 174 | +WEAK const PinMap PinMap_SPI_MOSI[] = { | 
|  | 175 | +  {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_DISABLE)}, | 
|  | 176 | +  {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | 
|  | 177 | +  {NC,   NP,   0} | 
|  | 178 | +}; | 
|  | 179 | +#endif | 
|  | 180 | + | 
|  | 181 | +#ifdef HAL_SPI_MODULE_ENABLED | 
|  | 182 | +WEAK const PinMap PinMap_SPI_MISO[] = { | 
|  | 183 | +  {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_DISABLE)}, | 
|  | 184 | +  {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | 
|  | 185 | +  {NC,   NP,   0} | 
|  | 186 | +}; | 
|  | 187 | +#endif | 
|  | 188 | + | 
|  | 189 | +#ifdef HAL_SPI_MODULE_ENABLED | 
|  | 190 | +WEAK const PinMap PinMap_SPI_SCLK[] = { | 
|  | 191 | +  {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_DISABLE)}, | 
|  | 192 | +  {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | 
|  | 193 | +  {NC,   NP,   0} | 
|  | 194 | +}; | 
|  | 195 | +#endif | 
|  | 196 | + | 
|  | 197 | +#ifdef HAL_SPI_MODULE_ENABLED | 
|  | 198 | +WEAK const PinMap PinMap_SPI_SSEL[] = { | 
|  | 199 | +  {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_DISABLE)}, | 
|  | 200 | +  {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | 
|  | 201 | +  {NC,    NP,   0} | 
|  | 202 | +}; | 
|  | 203 | +#endif | 
|  | 204 | + | 
|  | 205 | +//*** No CAN *** | 
|  | 206 | + | 
|  | 207 | +//*** No ETHERNET *** | 
|  | 208 | + | 
|  | 209 | +//*** No QUADSPI *** | 
|  | 210 | + | 
|  | 211 | +//*** No USB *** | 
|  | 212 | + | 
|  | 213 | +//*** No SD *** | 
|  | 214 | + | 
|  | 215 | +#endif /* !CUSTOM_PERIPHERAL_PINS */ | 
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