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Commits on Aug 20, 2025

• [AMD][Turin][Dense] Complete the EPYC Embedded 9005 Series

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• [AMD] Adding the Ryzen 5 5500X3D processor

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• [AMD] Complete the Ryzen 8000 Series

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Commits on Aug 16, 2025

• [aarch64] Pass explicit variable-immediate type to fix assembly

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Commits on Aug 9, 2025

• [AMD][Family 15h] Provides Package voltage from Core aggregation

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• [Doc] README for Fedora Copr repository

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Commits on Aug 8, 2025

• [Build][x86_64] Fedora v34 api fix detecting `RHEL MINOR` `99`

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• [Intel][Skylake/X] Provides Package voltage from Core aggregation

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Commits on Aug 2, 2025

• [AMD][Zen5][SHP] Introducing the Shimada Peak architecture

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Commits on Aug 1, 2025

• [Intel][Emerald Rapids] Align MSR entries with Sapphire Rapids

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• [Intel][Sapphire Rapids] Xeon Scalable 4th gen. startup fix (#560)

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Commits on Jul 16, 2025

• [AMD][Zen5] Introduced a UMC capabilities decoder for STX families

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Commits on Jul 13, 2025

• [CI] Comment out the unreachable debian-10-buster

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• [AMD][Zen5][STX/KRK/STXH] Avoid undefined COF and Power registers

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Commits on Jul 10, 2025

• [AMD] Switch Zen5/Strix families to the Raphael voltage decoder

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• [AMD][Zen5/Strix Halo] Probe Memory Controller from DID `0x12b8`

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Commits on Jul 9, 2025

• [Build] Enforce targets are not built more than necessary

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• [Build] Clarify Makefile help, info, and version targets

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Commits on Jul 8, 2025

• [Build][aarch64] Temperature compilation based on `CONFIG_THERMAL`

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Commits on Jul 7, 2025

• [aarch64] Getting temperature from the Generic Thermal Management

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Commits on Jun 30, 2025

• [AMD][Zen5][Strix Halo] Adding the RYZEN AI MAX 385

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Commits on Jun 29, 2025

• [AMD] Add fallback TjMax for legacy CPU families

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Commits on Jun 23, 2025

• [AMD] Add missing DCU and XPROC_LEAK bitmasks on legacy processors

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• [AMD][Excavator] Fix setting the scope of temperature to Package

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• [aarch64][riscv64][ppc64] Optimize `POWERED()` macro with branchless 3-state

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Commits on Jun 22, 2025

• [Build] Support building CoreFreq binaries individually or together

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Commits on Jun 21, 2025

• [CR] In `_F4()` cast complement mask to the type of `bit` argument

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• [UI] Rephrased string for the CPUID.80000001.ECX[27] feature

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• [UI] Optimize `POWERED()` macro with branchless 3-state array lookup

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Commits on Jun 20, 2025

• [aarch64] Provide the state of WFI/WFE Low Power Methods

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Commits on Jun 16, 2025

• [aarch64] Set the UI comment for PMULL instruction

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Commits on Jun 14, 2025

• [aarch64] Registers requiring a safe access guard (`TID3`)

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• [aarch64] Drop Experimental guard to safely read `ID_AA64MMFR3_EL1`

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Commits on Jun 13, 2025

• [aarch64] Display detected Interconnect Technology in UI

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Commits on Jun 11, 2025

• [aarch64] Query Cache Coherent Network|Interconnect via DT

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