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Commits on Apr 9, 2017

• README: removed leading spaces.

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  6dfa03a

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Commits on Mar 23, 2017

• HTT & MC implementation for AMD Fam. 0Fh (K8)

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  6cda616

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Commits on Mar 13, 2017

• Prerequisites.

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  6c290af

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• Prerequistes.

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  adace22

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Commits on Mar 12, 2017

• GLOBAL_PERF_OVF_CTRL bits structure fix.

  cyring

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  461298a

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• Xeon 7500, E7 Westmere (workaround fix)

  cyring

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  cebd2f3

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Commits on Mar 11, 2017

• Support of the kernel 4.10 Hot-Plug.

  cyring

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  0b47d5c

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• Allows conditional build against kernel 4.10 (CPU hot-plug disable).

  cyring

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  d4d549e

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Commits on Mar 8, 2017

• Fix typo in DIMM Columns.

  cyring

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  921c088

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• DIMM Columns (Nehalem)

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  218b22a

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Commits on Mar 7, 2017

• DIMM Geometry (Nehalem)

  cyring

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  c9fb8c5

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Commits on Mar 5, 2017

• Fix buffer overflow.

  cyring

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  9b4616b

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Commits on Mar 4, 2017

• IMC implementation for Lynnfield.

  cyring

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  d09b39d

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Commits on Mar 3, 2017

• IMC implementation for Generation 2/3/4

  cyring

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  ab6d672

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Commits on Mar 2, 2017

• DRAM timing command rate (Nehalem)

  cyring

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  6593af6

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Commits on Feb 27, 2017

• Comment experimental code to fix build.

  cyring

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  7defb25

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Commits on Feb 26, 2017

• DRAM timings decoding

  cyring

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  16a6cb2

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Commits on Feb 25, 2017

• DRAM Cas Write Latency (tested Nehalem + G965)

  cyring

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  82f4326

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Commits on Feb 19, 2017

• Testing PCI ids for Sandy/Ivy/Haswell

  cyring

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  6accdaa

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• C220 chipset for Haswell (untested) / Experimental features argument added.

  cyring

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  eb7f896

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Commits on Feb 17, 2017

• Experimental and untested C200 chipset implementation for Sandy Bridge & Ivy Bridge IMC

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  467a90c

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Commits on Feb 8, 2017

• Advanced Timings (X58)

  cyring

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  a191ecf

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Commits on Feb 7, 2017

• Structify Uncore between driver & daemon.

  cyring

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  c7beeb2

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Commits on Feb 5, 2017

• PCI (registers documentation)

  cyring

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  8ce1822

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Commits on Feb 4, 2017

• Buffers fixed.

  cyring

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  66ccc24

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• Safe read of MSR_FSB_FREQ

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  538c588

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Commits on Feb 3, 2017

• Enumeration of ratios for BUS and DRAM speeds.

  cyring

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  63138e1

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• Memory Controller & DDR timings (Core2 gen)

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  9b2646a

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Commits on Feb 2, 2017

• PCI code registered.

  cyring

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  e2f7a85

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Commits on Jan 28, 2017

• PCI code refactored.

  cyring

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  2066a41

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Commits on Jan 27, 2017

• Arch "Knights Landing"

  cyring

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  58b62a4

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• Insert Xeon Phi, Airmont FSB. Misc codes.

  cyring

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  1a8229d

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Commits on Jan 24, 2017

• Designing Uncore

  cyring

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  5e62c23

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• QPI Speed, Ratio, Clock (Nehalem i7)

  cyring

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  c7a18ee

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Commits on Jan 23, 2017

• IMC (Nehalem)

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  64c1259

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